VLSI Architectures for Turbo Code Decoders, LDPC Code Decoders and List Sphere Decoders

VLSI Architectures for Turbo Code Decoders, LDPC Code Decoders and List Sphere Decoders

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Also in this dissertation, the load imbalance problem in the two stages of belief propagation decoding algorithm for low-density parity-check (LDPC) codes is studied and a new architecture is presented to redistribute the computational load between these two stages.It finds a list of most likely symbols within a hyper-sphere and generates soft information based on the list. Thus, it provides a simple way of iteratively detecting and decoding any linear space-time mapping combined with any channel codeanbsp;...


Title:VLSI Architectures for Turbo Code Decoders, LDPC Code Decoders and List Sphere Decoders
Author: Yuping Zhang
Publisher:ProQuest - 2007
ISBN-13:

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